I am happy to say that things progressed quite a bit!
The first step was to design a good matrix scanning program.
This is more difficult than it looks, as during my simulations I saw that I had only 1us window to read all the row values.
So it works no problem using CPU polling if you want to read only one row (and this is what I did to check that the PCB was working as intended).
But reading 8 rows by reading IO pins using the CPU and expecting to have consistent results is another matter…
Several factors can make this process using the CPU unreliable:
- We could simply not have time to scan all 8 row IO pins, and we’d miss key presses.
- This could ‘work’ most of the time, but be interrupted by an external code or kernel process and miss some keypresses as a result.
- The timing at witch to read the IO pins is important, a bit sooner or a bit later and we can have slightly different results; we need to have this timing very consistant (I measured an optimum time of 0.8us between activating a column and reading row IO pins).
While current Model-F PCB is reading row IO pins using CPU “as fast as possible” (said Tom Wong-Cornall in it’s blog), this not gonna do it at least for my design.
But I knew that from the start thanks to the LTSpice simulations and selected the right MCU for this task
Hello RP2040 and it’s PIO feature!
I should be able to make a PIO program to do the matrix scanning without CPU usage and very tight and consistent timings.
I took me a while to do that (my first time doing PIO stuff and this is another specialized hardware to learn) but finally had my PIO matrix scanning program working like a charm :slight_smile:
Second step, test this matrix scanning program on the real beast, my own Model-F F77 board.
For that I needed to desolder the current PCB and solder the Leyden Jar PCB.
This was a big step for me as it would not only determine that my PCB work on the real hardware, but also would validate that everything fits nicely mechanically.
Not entering too much into details, I have to say that the official PCB has been a ***** to desolder :frowning:
But here is the result:
This is ugly but had to put back the kapton tape as the lower part of the PCB is touching the bottom case (as with the official PCB).
Happy that everything screws and fits as intended, there is even place for my SWD connector for developping/debugging!
Debugging session that started shortly after:
So how does it works?
First the detected voltages are lower than in my simulations:
- This is normal as we now have to deal with parasitic capacitance and inductance.
- I have very early timings in my PIO program, this could improve in the future (already tweaked a few things to make it better).
- We are using 3.3V for the column IO pins instead of 5V for the official PCB, having a lower voltage peak was more or less planned.
But the most important thing to have is consistency and we have excellent consistency here:
- We have only ~1mV deviation for the same keys tested during several tests sessions.
- Variance between all unpressed keys is 8mV at most (looks to be the same with pressed keys).
- We have a peak voltage variance of ~30mV between pressed and unpressed key, this is more than enough to perform a very stable key press detection :slight_smile:
- Pressing several keys at once or only one does not look to change the detected peak voltage much.
I think that the key of this consistency is to have a reliable 3.3V voltage source as it is generated by the onboard voltage regulator.
On the other end, I had some undetected keys problems with the official PCB when plugged on my ****ty USB hub; this may be explained by some fluctuations on the 5V line, that even the calibration program can’t handle. No problem when plugged on my PC USB ports though
To conclude this will definitely work like a charm and I am excited to start writing a VIAL firmware to confirm this.
On top of that there is another good news, the scanning process is quite fast: as of now scanning all 16 columns and 8 rows takes only 640uS (40uS per column).
This could change in the future:
- If changing the timings helps to have better peak voltage detection it could end to be slower.
- But it could also be possible to have something even faster